char str[320];//yek jomle 320 karakteri
unsigned int i=0,j=0;
for(j=0;j<10;j++)
{
for(i=1;i<=32;i++)
{
payload[i]=str[i+j*32];
}
send();
}
char str[320]="abbasali";//yek jomle 320 karakteri unsigned int i=0,j=0;
for(j=0;j<10;j++)
{
for(i=1;i<=32;i++)
{
payload[i]=str[i+j*32];
}
Send_Data(1 , &data1);
}
char str[320]="abbasali";//yek jomle 320 karakteri
unsigned int i=0;
for(i=0;i<10;i++)
{
Send_Data(32 , &str[32*i]);
}
char i[2]; i[0]=1; i[1]=2; Send_Data(2,&i[0]);
char str[320];
unsigned int i=0,j=0;
for(j=0;j<10;j++)
{
if(State!=1)
while(1);//takhir ta residan data badi
for(i=1;i<=32;i++)
{
str[i+j*32]=payload[i];
}
State=0;
}
#include <mega8.h>
#define xtal 8000000
#include <nRF24L01+.h>
#include <delay.h>
char k=0;
void main(void)
{ DDRD=0x80;
PORTD.7=0;
nRF_Config(1,0x20);
while (1)
{
if(State==1)
{
k=payload[1];
if(k==1)
{ PORTD.7=1;
data1=0x03;
}
else
{ PORTD.7=0;
data1=0x02;
}
State=0;
Set_Reg(W_ACK_PAYLOAD);
}
}
}
#define xtal 8000000
#include <mega8.h>
#include <delay.h>
#include <nRF24L01+.h>
bit k=1,allow=1;
unsigned char i=0;
void main(void)
{
PORTD.7=1;
DDRD.6=1;
nRF_Config(0,0x20);
while (1)
{ if(PIND.7==0 && allow==1)
{
send_actived=1;
State=0;
Send_Data(1,1);
allow=0;
}
else if(PIND.7==1 && allow==0)
{ send_actived=1;
State=0;
Send_Data(1,0);
allow=1;
}
delay_us(100);
if(ack==0x03) PORTD.6=1;
else if(ack==0x02) PORTD.6=0;
}
}
#ifndef __nRF24L01+_H
#define __nRF24L01+_H
#include <delay.h>
#define CE PORTB.0
#define CSN PORTB.2
/* Instruction Mnemonics */
#define R_REGISTER 0x00
#define W_REGISTER 0x20
#define REGISTER_MASK 0x1F
#define ACTIVATE 0x50
#define R_RX_PL_WID 0x60
#define R_RX_PAYLOAD 0x61
#define W_TX_PAYLOAD 0xA0
#define W_ACK_PAYLOAD 0xA8
#define FLUSH_TX 0xE1
#define FLUSH_RX 0xE2
#define REUSE_TX_PL 0xE3
#define NOP 0xFF
/* Memory Map */
#define CONFIG 0x00
#define EN_AA 0x01
#define EN_RXADDR 0x02
#define SETUP_AW 0x03
#define SETUP_RETR 0x04
#define RF_CH 0x05
#define RF_SETUP 0x06
#define STATUS 0x07
#define OBSERVE_TX 0x08
#define CD 0x09
#define RX_ADDR_P0 0x0A
#define RX_ADDR_P1 0x0B
#define RX_ADDR_P2 0x0C
#define RX_ADDR_P3 0x0D
#define RX_ADDR_P4 0x0E
#define RX_ADDR_P5 0x0F
#define TX_ADDR 0x10
#define RX_PW_P0 0x11
#define RX_PW_P1 0x12
#define RX_PW_P2 0x13
#define RX_PW_P3 0x14
#define RX_PW_P4 0x15
#define RX_PW_P5 0x16
#define FIFO_STATUS 0x17
#define DYNPD 0x1C
#define FEATURE 0x1D
// my definitions
#define W_RF_CH 0x25
#define W_ARD_ARC 0x24
// state 2 = dade ersal shode va TX_DS=1 shode va dar halate transmitter hastim
// state 3 = dade payload_Ack dorost bude va daryaft shode va ma transmitter hastim
// state 4 = dade ersal shode amma TX_DS=0 hast yani ACK nayoomade va bayad dobare ersal beshe
// state 5 =
#pragma used+
/* library function prototypes */
flash unsigned char Base_Addrs[5]={0x00,0x01,0x03,0x07,0x00};
unsigned char Temp_Addrs[5]={0x00,0x01,0x03,0x07,0x00};
unsigned char payload[33];
unsigned char Command_Reg=0,Status_Reg=0,State=0,data1=0,ack=0;
char Opr_Mode;
bit send_actived = 0;
unsigned char spi(unsigned char data)
{
SPDR=data;
while(!(SPSR & 0x80));
data=SPSR;
return SPDR;
}
void Set_Reg(unsigned char ins)
{
int i;
CSN = 0;
Status_Reg=spi(ins);
switch(ins & 0xE0)
{
case 0x00: // vorood be halate R_REGISTER ke yek registeri ro bekhunim
{
if((ins & 0x1F)==0x0A || (ins & 0x1F)==0x0B || (ins & 0x1F)==0x10) //halate RX_ADDR_P0,RX_ADDR_P1,TX_ADDR
{
for(i=4;i>=0;i--)
{
Temp_Addrs[i]=spi(NOP); // RX_ADDR_P0 ya RX_ADDR_P1 ya TX_ADDR ro mikhunim
}
}
else // be joz 3 registere ghabli , baraye khundane baghieye register varede in halat mishe
{ // va meghdare register tuye command_Reg zakhire mishe
Command_Reg=spi(NOP);
}
break;
}
case W_REGISTER:
{
if((ins & 0x1F)==0x0A || (ins & 0x1F)==0x0B || (ins & 0x1F)==0x10) // neveshtan dar 3 registere ghabli
{
for(i=4;i>=0;i--) // avval bayad byte bi arzesh neveshte beshe
{
spi(Base_Addrs[i]);
}
}
else // neveshtan dar har registeri be joz 3 registere ghabli
{
spi(Command_Reg); //meghdari ro ke mikhaim tuye register benevisim bayad berizim tu Command_Reg
}
break;
}
case R_RX_PL_WID: // bakhshe marbut be tedad byte dade voroodi va ya khode dade
{
if((ins & 0x01)==1) // R_RX_PAYLOAD Mode _ read payload
{
i=payload[0]; // i ro barabare tedad byte haye ettela'ate voroodi gharar midim
while(i!=0)
{
payload[i]=spi(NOP);
i--;
}
}
else // baraye khundane tedad byte dade varede in bakhsh mishe va tuye Command_Reg zakhire mishe
{
Command_Reg=spi(NOP);
}
break;
}
case W_TX_PAYLOAD:
{ if((ins & 0x08)==0)
{
i=payload[0]; // tedad byte dadeye ersali ro ghablan vared kardim
while(i!=0)
{
spi(payload[i]); // dade ro mifrestim
i--;
}
}
else // ersale ACK_PAYLOAD
{
spi(data1);
}
break;
}
}
CSN=1; // dastur anjam shod va bayad CSN=1 beshe
delay_us(10);
}
// External Interrupt 2 service routine
interrupt [EXT_INT0] void ext_int0_isr(void)
{
if(Opr_Mode==0)
{
Set_Reg(NOP); // get Status_Register
if((Status_Reg & 0x40)==0x40)// agar auto_ack fa'al bashad bad az inke ack umad yek mishe
{ // dar asl TX_DS fa'al shod
State=2; // state 2= TX_DS fa'al va dade ersal shode
Set_Reg(FIFO_STATUS); // vaziate FIFO_STATUS dar command_Reg zakhire shod
if((Command_Reg & 0x02)==0) // Agar RX_FIFO por bashe yani ACK_PAYLOAD darim
{
Set_Reg(R_RX_PL_WID); // toole dadeye Ack_Payload ro mikhune
if(Command_Reg<=32) // agar toole dade zire 32 bashe pas doroste( tebghe jadvale 20 safheye 51)
{
payload[0]=Command_Reg; // toole dade dar payload[0] zakhire mishe
Set_Reg(R_RX_PAYLOAD); // tamame 32 byte gerefte mishe va zakhire mishe dar payload[1~32]
State = 3; // state 3 yani dadeha khande shod
ack=payload[1];
}
else // age toole dade bishtar az 32 byte bashe pas error hast
{
Set_Reg(FLUSH_RX);
}
}
}
else if((Status_Reg & 0x10)==0x10) // yani hanuz ack nayumade va MAX_RT=1
{
State = 4;
Set_Reg(FLUSH_TX);
}
}
else
{ Set_Reg(NOP); // get Status_Register
if(((Status_Reg & 0x40)==0x40) || ((Status_Reg & 0x20)==0x20)) // Agar RX_DR=1 va ya TX_DS=1 Bashe
{
Set_Reg(R_RX_PL_WID); // toole dadeye daryafti ro mikhune
if(Command_Reg>32) // age toole dade bishtar az 32 byte bashe pas error hast
{
Set_Reg(FLUSH_RX);
}
else
{
payload[0]=Command_Reg; // toole dade dar payload[0] zakhire mishe
Set_Reg(R_RX_PAYLOAD); // dadeye voroodi khunde mishe
State=1; // dadeye daryafti khande shod
}
}
}
Command_Reg=0x7E; // in meghdar ro ba dasture badi tuye STATUS_Register mirize
Set_Reg(0x27); // RX_DR , MAX_RT , TX_DS ro sefr mikone va mige RX_FIFO va TX_FIFO khalie
Set_Reg(FLUSH_TX); // TX_FIFO ro khali mikone
}
void Send_Data(char num , char data)
{
payload[0] = num;
payload[1]=data;
if(send_actived)
{
send_actived=0;
if((Temp_Addrs[4]==Base_Addrs[4]) && (Temp_Addrs[3]==Base_Addrs[3]) && (Temp_Addrs[2]==Base_Addrs[2]) && (Temp_Addrs[1]==Base_Addrs[1]) && (Temp_Addrs[0]==Base_Addrs[0]))
{
Set_Reg(NOP); // get Status_Register
if((Status_Reg & 0x01)==0) // space available in TX_FIFO
{
Set_Reg(W_TX_PAYLOAD); // gharar dadane dade dar TX_FIFO
delay_ms(10);
CE = 1; // ba yek kardane CE varede TX_Mode mishim , avval bayad dade ro varede TX_FIFO ****m va bad
// CE=1 chon age avval CE=1 beshe varede halate Standby II mishim
delay_us(200);
CE = 0; // be halate Standby I barmigardim
delay_ms(10);
}
}
else
State = 5; // agar hich dastgahi ba adrese yeksan vojud nadasht varede halate 5 mishim
}
}
void nRF_Config(char mode,unsigned char RF_CH_SELECT)
{
PORTD.2=1;
PORTB=0x04;
DDRB=0x2D;
CSN=1;
CE=0;
GIFR=0x40;
GICR|=0x40;
SPCR=0x50;
#asm("sei")
delay_ms(110);
Opr_Mode=mode;
Command_Reg=0x01;
Set_Reg(0x21);
Command_Reg = 0x01;
Set_Reg(0x22);
Command_Reg = 0x03;
Set_Reg(0x23);
Command_Reg = 0x2f;
Set_Reg(W_ARD_ARC);
Command_Reg = RF_CH_SELECT;
Set_Reg(W_RF_CH);
Command_Reg = 0x26; // 250kbps
Set_Reg(0x26);
Set_Reg(0x2A);
Set_Reg(0x30);
Command_Reg = 0x01;
Set_Reg(0x3C);
Command_Reg = 0x07;
Set_Reg(0x3D);
if(mode==0) // Transmitter
{
Set_Reg(0x30);
Command_Reg=0x4E; // RX_DR not reflected on IRQ ,, StandBy 1 Mode
Set_Reg(W_REGISTER); // CONFIG Register Setting
delay_ms(100);
send_actived=1;
}
else // Reciever
{
Command_Reg = 0x1F; // MAX_RT not reflected on IRQ ,, StandBy 1 Mode
Set_Reg(W_REGISTER); // CONFIG Register Setting
delay_ms(5);
CE = 1; // Go To RX_Mode
}
}
#pragma used-
//#pragma library nRF24L01+.lib
#endif
nRF_Config(0);
nRF_Config(1);
دیدگاه